Research

Hey, I am Partha, BOSS at the MARS Lab

I am a Boeing Centennial Chair Professor in Computer Engineering at the school of EECS, Washington State University (WSU), Pullman, Washington. I joined WSU in 2005, as an Assistant Professor. I received my PhD in Electrical and Computer Engineering from the University of British Columbia 2005. I obtained my M.S. in Computer Science from the National University of Singapore in 2002 and B.Tech in Electronics and Communication Engineering from University of Calcutta, India in 1997.

Mission

The rapid advance in ML models and ML-specific hardware makes it increasingly challenging to build efficient and scalable learning systems that can take full advantage of the performance capability of modern hardware and runtime environments. Today's ML systems heavily rely on human effort to optimize the training and deployment of ML models on specific target platforms. Unlike conventional application domains, learning systems need to address a continuously growing complexity and diversity in machine learning models, hardware backends, and runtime environments. The Computer Architecture and Machine Learning Research Lab at Washington State University (WSU) is a distinguished center of excellence committed to pushing the boundaries of knowledge in the fields of chiplet-based systems, manycore architecture design, resource management, Processing-in-Memory (PIM) and fault-tolerant systems. With a relentless pursuit of groundbreaking research, a culture of innovation, and a dedication to cultivating the next generation of computer architects and machine learning experts, our lab seeks to shape the forefront of these critical areas of study. Our lab is at the forefront of pioneering research on chiplet-based systems, where we explore and develop novel methodologies to revolutionize computer system design. By leveraging the advantages of chiplets—discrete modular components that can be independently designed and integrated into a single system—we aim to overcome the limitations imposed by monolithic designs. Through interdisciplinary collaborations, we strive to unlock new avenues of system-level integration, fostering enhanced performance, scalability, and energy efficiency. Manycore architecture design is the core focus of our lab's research endeavors. As computing systems continue to embrace parallelism, we investigate and engineer scalable architectures that can accommodate a multitude of processing cores while ensuring optimal resource utilization. Our research encompasses the intricate interplay of interconnectivity, memory hierarchy, and workload distribution to facilitate highly parallel and high-performance computing.